SH7144 Datasheet, PDF (746/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Table A.5 Pin States
Pin Function
Pin State
Reset
Power-down
Type
Pin Name
Power-On
(DBGMD=L)
Power-On
(DBGMD=H)
Manual
Software
standby
Sleep
Operating
ASEBRKAK Z
O
O
O
O
mode control
Legend
I: Input
O: Output
H: High-level output
L: Low-level output
Z: High impedance
K: Input pins become high-impedance, and output pins retain their state.
Notes: 1. When the HIZ bit in SBYCR is set to 1, the output pins enter their high-impedance state.
2. This pin operates as an input pin during power-on reset period. This pin should be
pulled up to prevent malfunction. In this case, the resistance value must be 1MΩ or
higher.
3. This pin operates as an input pin when the IRQEL bit in SBYCR is set to 0.
4. This pin operates as an input pin when the IRQEH bit in SBYCR is set to 0.
5. This pin becomes high-impedance in the emulator.
6. In the emulator, this pin operates as an input pin when the HIB bit in SBYCR is set to 0.
Rev. 2.0, 09/02, page 706 of 732