SH7144 Datasheet, PDF (129/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

6.8.4
Handling Interrupt Request Signals as Source for CPU Interrupt but Not DMAC
and DTC Activating
1 Do not select DMAC activating sources or clear the DME bit to 0.
2. For DTC, clear the corresponding DTE bits to 0.
3. When interrupts occur, interrupt requests are sent to the CPU.
4. The CPU clears the interrupt source and performs the necessary processing in the interrupt
processing routine.
Rev. 2.0, 09/02, page 89 of 732