SH7144 Datasheet, PDF (418/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Table 13.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) (1)
Logical Bit Rate
4
(bit/s)
n
N
250
500
1000
2500
5000
10000
25000
50000
100000
250000
500000
1000000
2500000
5000000
2
124
1
249
1
124
1
49
1
24
0
99
0
39
0
19
0
9
0
3
0
1
0
0
——
——
Operating Frequency Pφ (MHz)
6
8
10
n
N
n
N
n
N
2
187
2
93
1
187
1
74
——
0
149
0
59
0
29
0
14
0
5
0
2
——
——
——
2
249
2
124
1
249
1
99
1
49
1
24
1
9
1
4
0
19
0
7
0
3
0
1
——
——
3
77
2
155
2
77
1
124
1
61
0
249
0
99
0
49
0
24
0
9
0
4
——
0
0
——
12
n
N
3
93
2
187
2
93
1
149
1
74
——
1
14
0
59
0
29
0
11
0
5
0
2
——
——
Table 13.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) (2)
Logical Bit
Rate (bit/s)
250
500
1000
2500
5000
10000
25000
50000
100000
250000
500000
1000000
2500000
5000000
14
n
N
3 108
2 218
2 108
1 174
1 86
1 43
0 139
0 69
0 34
0 13
06
——
——
——
Operating Frequency Pφ (MHz)
16
18
20
n
N
n
N
n
N
3 124
2 249
2 124
2 49
2 24
1 49
1 19
19
14
11
10
03
——
——
3 140
3 69
2 140
1 224
1 112
1 55
0 179
0 89
0 44
0 17
08
——
——
——
3 155
3 77
2 155
1 249
1 124
1 62
1 24
0 99
0 49
0 19
09
04
01
00
22
n
N
3 171
3 85
3 42
2 68
1 137
1 68
0 219
0 109
0 54
0 21
0 10
——
——
——
Rev. 2.0, 09/02, page 378 of 732