SH7144 Datasheet, PDF (430/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Initialization
[1] SCI initialization:
[1]
Set the RxD pin using the PFC.
Start reception
[2]
Read ORER, PER, and
FER flags in SSR
[2]
PER FER ORER = 1
Yes
[3]
No
Error processing
(Continued on next page)
[3] Receive error processing and break
detection:
If a receive error occurs, read the
ORER, PER, and FER flags in SSR to
identify the error. After performing the
appropriate error processing, ensure
that the ORER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
Read RDRF flag in SSR
[4]
No
RDRF = 1
Yes
[4] SCI status check and receive data read:
Read SSR and check that RDRF = 1,
then read the receive data in RDR and
clear the RDRF flag to 0. Transition of
the RDRF flag from 0 to 1 can also be
identified by an RXI interrupt.
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received?
[5]
Yes
Clear RE bit in SCR to 0
[5] Serial reception continuation procedure:
To continue serial reception, before the
stop bit for the current frame is
received, read the RDRF flag, read
RDR, and clear the RDRF flag to 0.
The RDRF flag is cleared automatically
when DMAC or DTC is activated by an
RXI interrupt and the RDR value is
read.
<End>
Figure 13.9 Sample Serial Reception Data Flowchart (1)
Rev. 2.0, 09/02, page 390 of 732