SH7144 Datasheet, PDF (307/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

output, with the compare register containing the pre-change data, and the temporary register
containing the new data. In this interval, the three counters—TCNT_3, TCNT_4, and TCNTS—
and two registers—compare register and temporary register—are compared, and PWM output
controlled accordingly.
Transfer from temporary
register to compare register
Transfer from temporary
register to compare register
Tb2
TGRA_3
TCDR
TGRA_4
TGRC_4
TDDR
H'0000
Buffer register
TGRC_4
Temporary register
TEMP2
Compare register
TGRA_4
Ta
Tb1
TCNTS
TCNT_3
TCNT_4
Ta
Tb2
Ta
H'6400
H'6400
H'6400
H'0080
H'0080
H'0080
Output waveform
Output waveform
(Output waveform is active-low)
Figure 11.35 Example of Complementary PWM Mode Operation
Rev. 2.0, 09/02, page 267 of 732