SH7144 Datasheet, PDF (389/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Section 12 Watchdog Timer
The watchdog timer (WDT) is an 8-bit timer that can generate an internal reset signal for this LSI
if a system crash prevents the CPU from writing to the timer counter, thus it causes the overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
The block diagram of the WDT is shown in figure 12.1.
12.1 Features
• Selectable from eight counter input clocks.
• Switchable between watchdog timer mode and interval timer mode
• Clears software standby mode
In watchdog timer mode
• Output WDTOVF signal
• Selectable whether this LSI is internally reset or not.
In interval timer mode
• If the counter overflows, the WDT generates an interval timer interrupt (ITI).
WDT0400A_020020020700
Rev. 2.0, 09/02, page 349 of 732