SH7144 Datasheet, PDF (509/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Bit Bit Name Initial Value R/W Description
4
ADST
0
R/W A/D Start
Starts or stops A/D conversion. When this bit is set to
1, A/D conversion is started. When this bit is cleared
to 0, A/D conversion is stopped and the A/D converter
enters the idle state. In single or single-cycle scan
mode, this bit is automatically cleared to 0 when A/D
conversion ends on the selected single channel. In
continuous scan mode, A/D conversion is
continuously performed for the selected channels in
sequence until this bit is cleared by a software, reset,
or in software standby mode, or module standby
mode.
3
ADCS
0
R/W A/D Continuous Scan
Selects either single-cycle scan or continuous scan in
scan mode. This bit is valid only when scan mode is
selected.
0: Single-cycle scan
1: Continuous scan
When changing the operating mode, first clear the
ADST bit in the A/D control registers (ADCR) to 0.
2
—
1
—
Reserved
1
—
1
0
—
1
—
These bits are always read as 1, and should only be
—
written with 1.
Rev. 2.0, 09/02, page 469 of 732