SH7144 Datasheet, PDF (583/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

17.1.10 Port E Control Registers L1 and L2 (PECRL1 and PECRL2)
The port E control registers L1 and L2 (PECRL1 and PECRL2) are 16-bit readable/writable
registers that are used to select the multiplexed pin function of the pins on port E.
(1) Port E Control Registers L1 and L2 (PECRL1 and PECRL2) in the SH7144
Register Bit
Initial
Bit Name Value R/W Description
PECRL1 15
PE15MD1 0
R/W PE15 Mode
PECRL1 14
PE15MD0 0
R/W Select the function of the
PE15/TIOC4D/DACK1/IRQOUT pin.
00: PE15 I/O (port)
01: TIOC4D I/O (MTU)
10: DACK1 output (DMAC)
11: IRQOUT output (INTC)
PECRL1 13
PE14MD1 0
R/W PE14 Mode
PECRL1 12
PE14MD0 0
R/W Select the function of the PE14/TIOC4C/DACK0
pin.
00: PE14 I/O (port)
01: TIOC4C I/O (MTU)
10: DACK0 output (DMAC)
11: Setting prohibited
PECRL1 11
PE13MD1 0
R/W PE13 Mode
PECRL1 10
PE13MD0 0
R/W Select the function of the PE13/TIOC4B/MRES
pin.
00: PE13 I/O (port)
01: TIOC4B I/O (MTU)
10: MRES input (INTC)
11: Setting prohibited
PECRL1 9
PE12MD1 0
R/W PE12 Mode
PECRL1 8
PE12MD0 0
R/W Select the function of the PE12/TIOC4A/TXD3
pin.
00: PE12 I/O (port)
01: TIOC4A I/O (MTU)
10: Setting prohibited
11: TXD3 output (SCI)
Rev. 2.0, 09/02, page 543 of 732