SH7144 Datasheet, PDF (145/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

8.2 Register Descriptions
DTC has the following registers.
• DTC mode register (DTMR)
• DTC source address register (DTSAR)
• DTC destination address register (DTDAR)
• DTC initial address register (DTIAR)
• DTC transfer count register A (DTCRA)
• DTC transfer count register B (DTCRB)
These six registers cannot be directly accessed from the CPU.
When activated, the DTC transfer desired set of register information that is stored in an on-chip
RAM to the corresponding DTC registers. After the data transfer, it writes a set of updated register
information back to the RAM.
• DTC enable register A (DTEA)
• DTC enable register B (DTEB)
• DTC enable register C (DTEC)
• DTC enable register D (DTED)
• DTC enable register E (DTEE)
• DTC enable register G (DTEG)
• DTC control/status register (DTCSR)
• DTC information base register (DTBR)
For details on register addresses and register states during each processing, refer to section 25, List
of Registers.
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