SH7144 Datasheet, PDF (727/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

SDA0
t_BUF
V_IH
V_IL
t_STAH
t_SCLH
t_STAS
t_SP t_STOS
SCL0
P*
S*
t_Sf
t_SCLL
t_Sr
Sr*
t_SCL
t_SDAH
P*
t_SDAS
Note: * S, P, and Sr represent the following conditions
S: Start
P: Halt
Sr: Retransmission start
Figure 26.21 I²C Bus Interface Timing
26.3.11 Output Enable (POE) Timing
Table 26.13 Output Enable Timing
Conditions: V_CC = PLLV_CC =3.3 V ± 0.3 V, AV_CC = 3.3 V ± 0.3 V, AV_CC = V_CC ± 0.3 V,
AV_ref = 3.0 V to AV_CC , V_SS = PLLV_SS = AV_SS = 0 V, T_a = –20°C to +75°C
(regular specifications), T_a = –40°C to +85°C (wide-range specifications),
When programming or erasing flash memory, T_a = –20°C to +75°C.
Item
POE input setup time
POE input pulse width
Symbol
t
POES
t_POEW
Min
100
1.5
Max
Unit
Figure
—
ns
Figure 26.22
—
tpcyc
CK
input
t_POES
t_POEW
Figure 26.22 POE Input/Output Timing
Rev. 2.0, 09/02, page 687 of 732