SH7144 Datasheet, PDF (288/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

Table 11.31 PWM Output Registers and Output Pins
Output Pins
Channel
Registers
PWM Mode 1
PWM Mode 2
0
TGRA_0
TIOC0A
TIOC0A
TGRB_0
TIOC0B
TGRC_0
TIOC0C
TIOC0C
TGRD_0
TIOC0D
1
TGRA_1
TIOC1A
TIOC1A
TGRB_1
TIOC1B
2
TGRA_2
TIOC2A
TIOC2A
TGRB_2
TIOC2B
3
TGRA_3
TIOC3A
Cannot be set
TGRB_3
Cannot be set
TGRC_3
TIOC3C
Cannot be set
TGRD_3
Cannot be set
4
TGRA_4
TIOC4A
Cannot be set
TGRB_4
Cannot be set
TGRC_4
TIOC4C
Cannot be set
TGRD_4
Cannot be set
Note: In PWM mode 2, PWM output is not possible for the TGR register in which the period is set.
Rev. 2.0, 09/02, page 248 of 732