SH7144 Datasheet, PDF (57/773 Pages) Renesas Technology Corp – Hitachi SuperH RISC engine

2.2.4 Initial Values of Registers
Table 2.1 lists the values of the registers after reset.
Table 2.1 Initial Values of Registers
Classification
General registers
Register
R0 to R14
R15 (SP)
Control registers
SR
System registers
GBR
VBR
MACH, MACL, PR
PC
Initial Value
Undefined
Value of the stack pointer in the vector
address table
Bits I3 to I0 are 1111 (H'F), reserved bits
are 0, and other bits are undefined
Undefined
H'00000000
Undefined
Value of the program counter in the vector
address table
2.3 Data Formats
2.3.1 Data Format in Registers
Register operands are always longwords (32 bits). If the size of memory operand is a byte (8 bits)
or a word (16 bits), it is changed into a longword by expanding the sign-part when loaded into a
register.
31
0
Longword
Figure 2.2 Data Format in Registers
2.3.2 Data Formats in Memory
Memory data formats are classified into bytes, words, and longwords. Byte data can be accessed
from any address. Locate, however, word data at an address 2n, longword data at 4n. Otherwise,
an address error will occur if an attempt is made to access word data starting from an address other
than 2n or longword data starting from an address other than 4n. In such cases, the data accessed
cannot be guaranteed. The hardware stack area, pointed by the hardware stack pointer (SP, R15),
uses only longword data starting from address 4n because this area holds the program counter and
status register.
Rev. 2.0, 09/02, page 17 of 732