82801BA Datasheet, PDF (65/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
Figure 5-1. Primary Device Status Register Error Reporting Logic
D30:F0 BRIDGE_CNT
[Parity Error Response Enable]
D30:F0 BRIDGE_CNT
[SERR# Enable]
PCI Address Parity Error
AND
AND
D30:F0 CMD
[SERR_EN]
OR
D30:F0 ERR_STS
[SERR_DTT]
Delayed Transaction Timeout
D30:F0 ERR_CMD
[SERR_DTT_EN]
AND
D30:F0 CMD
[SERR_EN]
AND
SERR# Pin
AND
OR
D30:F0 BRIDGE_CNT
[SERR# Enable]
D30:F0 ERR_CMD
[SERR_RTA_EN]
Received Target Abort
AND
D30:F0 PD_STS
[SSE]
D30:F0 ERR_STS
[SERR_RTA]
Figure 5-2. Secondary Status Register Error Reporting Logic
D30:F0 BRIDGE_CNT
[SERR# Enable]
PCI Delayed Transaction Timeout
D31:F0 D31_ERR_CFG
[SERR_DTT_EN]
AND
LPC Device Signaling an Error
IOCHK# via SERIRQ
OR
TCO1_STS
[HUBERR_STS]
D31:F0 D31_ERR_CFG
[SERR_RTA_EN]
Received Target Abort
AND
AND
D30:F0 SECSTS
[SSE]
82801BA ICH2 and 82801BAM ICH2-M Datasheet
5-3