82801BA Datasheet, PDF (220/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Register and Memory Mapping
Table 6-1. PCI Devices and Functions
Bus:Device:Function
Bus 0:Device 30:Function 0
Bus 0:Device 31:Function 0
Bus 0:Device 31:Function 1
Bus 0:Device 31:Function 2
Bus 0:Device 31:Function 3
Bus 0:Device 31:Function 4
Bus 0:Device 31:Function 5
Bus 0:Device 31:Function 6
Bus 1:Device 8:Function 0
Function Description
Hub Interface to PCI Bridge
PCI to LPC Bridge¹
IDE Controller
USB Controller #1
SMBus Controller
USB Controller #2
AC’97 Audio Controller
AC’97 Modem Controller
LAN Controller
NOTES:
1. The PCI to LPC bridge contains registers that control LPC, Power Management, System Management,
GPIO, processor interface, RTC, Interrupts, Timers, DMA.
6.2
PCI Configuration Map
Each PCI function on the ICH2 has a set of PCI configuration registers. The register address map
tables for these register sets are included at the beginning of the chapter for the particular function.
Configuration Space registers are accessed through configuration cycles on the PCI bus by the
Host bridge using configuration mechanism #1 detailed in the PCI 2.1 specification.
Some of the PCI registers contain reserved bits. Software must deal correctly with fields that are
reserved. On reads, software must use appropriate masks to extract the defined bits and not rely on
reserved bits being any particular value. On writes, software must ensure that the values of
reserved bit positions are preserved. That is, the values of reserved bit positions must first be read,
merged with the new values for other bit positions and then written back. Note the software does
not need to perform read, merge, write operation for the configuration address register.
In addition to reserved bits within a register, the configuration space contains reserved locations.
Software should not write to reserved PCI configuration locations in the device-specific region
(above address offset 3Fh).
6.3
I/O Map
The I/O map is divided into Fixed and Variable address ranges. Fixed ranges cannot be moved. In
some cases they can be disabled. Variable ranges can be moved and can also be disabled.
6-2
82801BA ICH2 and 82801BAM ICH2-M Datasheet