82801BA Datasheet, PDF (197/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
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Table 5-81. Block Read/Write Protocol
Block Write Protocol
Bit
1
2:8
9
10
11:18
19
20:27
28
29:36
37
38:45
46
...
...
...
...
Description
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Byte Count - 8 bits
(Skip this step if I²C_En bit set)
Acknowledge from Slave
(Skip this step if I2C_EN bit set)
Data Byte 1 - 8 bits
Acknowledge from Slave
Data Byte 2–8 bits
Acknowledge from slave
Data Bytes / Slave
Acknowledges...
Data Byte N - 8 bits
Acknowledge from Slave
Stop
Bit
1
2:8
9
10
11:18
19
20
Block Read Protocol
Description
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Repeated Start
21:27
28
29
30:37
38
39:46
47
48:55
56
...
...
...
...
Slave Address - 7 bits
Read
Acknowledge from slave
Byte Count from slave - 8 bits
Acknowledge
Data Byte 1 from slave - 8 bits
Acknowledge
Data Byte 2 from slave - 8 bits
Acknowledge
Data Bytes from slave/Acknowledge
Data Byte N from slave - 8 bits
NOT Acknowledge
Stop
I²C Read
This command allows the ICH2 to perform block reads to certain I²C devices (e.g., serial
E²PROMs). The SMBus Block Read sends both the 7-bit address, as well as the Command field.
This command field could be used as the extended 10-bit address for accessing I²C devices that use
10-bit addressing.
However, this does not allow access to devices using the I²C “Combined Format” that has data
bytes after the address. Typically, these data bytes correspond to an offset (address) within the
serial memory chips.
Note: This new command is supported independent of the setting of the I²C_EN bit.
For I²C Read command, the value written into bit 0 of the Transmit Slave Address Register (SMB
I/O register, offset 04h) needs to be 0. The format that is used for the new command is shown in
Table 5-82:
82801BA ICH2 and 82801BAM ICH2-M Datasheet
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