82801BA Datasheet, PDF (138/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
Table 5-39. Causes of SMI# and SCI (Continued)
Cause
SCI SMI Additional Enables
Where Reported
Comment
TCO SMI: Change of
the BIOSWP bit from No Yes
0 to 1
BLD=1
BIOSWR_STS
TCO SMI: Write
attempted to BIOS
No
Yes
BIOSWP=1
BIOSWR_STS
BIOS_RLS writen to
Yes No
GBL_EN=1
GBL_RLS written to
No Yes
Write to B2h register
No Yes
BIOS_EN=1
none
GBL_STS
BIOS_STS
APM_STS
ACPI code in OS sets
GBL_RLS bit to cause
BIOS_STS bit active, which
causes SMI#.
This bit is set when the BIOS
sets the BIOS_RLS bit. The
ACPI handler will clear the
bit.
OS or BIOS writes to the
APMC register. SMM handler
clears.
Periodic timer expires
No
Yes
PERIODIC_EN=1
PERIODIC_STS
64 ms timer expires
No
Yes SWSMI_TMR_EN=1
SWSMI_TMR_STS
Allows SMM handler to exit
temporarily. Another SMI#
occurs about 64 ms later.
Legacy USB logic
Bit set based on address
No Yes LEGACY_USB_EN=1 LEGACY_USB_STS decode or incoming USB
IRQ.
Serial IRQ SMI reported No Yes
none
SERIRQ_SMI_STS
Device Trap: Device
DEVMON_STS,
Indicates that subsystems
monitors match address No Yes DEV[n]_TRAP_EN=1
may need to be powered
in its range
DEV[n]_TRAP_STS _{back on.}
SMBus Host Controller
SMBus Slave SMI
No Yes
No Yes
SMB_SMI_EN
none
SMBus host status reg.
SMBUS_SMI_STS
BATLOW# assertion
(ICH2-M)
Yes Yes
BATLOW_EN=1.
BATLOW_STS
Global Standby Timer
expires in S1 state
(ICH2-M)
Yes No
When activated, only counts
when in the S1 state.
Access microcontroller
62h/66h
No Yes
MCSMI_EN
MCSMI_STS
Access to Microcontroller
range (62h/66h) with
MCSMI_EN set.
SLP_EN bit written to 1
No Yes SMI_ON_SLP_EN=1 SMI_ON_SLP_EN_STS
NOTES:
1. SCI_EN must be 1 to enable SCI. SCI_EN must be 0 to enable SMI.
2. SCI can be routed to cause interrupt 9:11 or 20:23 (20:23 only available in APIC mode).
3. GBL_SMI_EN must be 1 to enable SMI.
4. EOS must be written to 1 to re-enable SMI for the next one.
5. The GPI[x]_ Route bits can enable GPIs to generate SMIs regardless of the state of SMI_EN.
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82801BA ICH2 and 82801BAM ICH2-M Datasheet