82801BA Datasheet, PDF (158/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
5.13.2
Detecting Improper FWH Programming
The ICH2 can detect the case where the FWH is not programmed. This results in the first
instruction fetched to have a value of FFh. If this occurs, the ICH2 sets the BAD_BIOS bit, which
can then be reported via the Heartbeat and Event reporting using an external, Alert on LAN*
enabled LAN Controller (See Section 5.13.2).
Handling an ECC Error or Other Memory Error
The Host Controller provides a message to indicate that it would like to cause an SMI#, SCI,
SERR#, or NMI. The software must check the Host Controller as to the exact cause of the error.
Alert on LAN*
The ICH2 integrated LAN controller supports Alert on LAN* functionality when used with the
82562EM Platform LAN Connect component. This allows the integrated LAN controller to report
messages to a network management console without the aid of the system processor. This is crucial
in cases where the processor is malfunctioning or cannot function due to being in a low-power
state.
The ICH2 also features an independent, dedicated SMBus interface, referred to as the SMLINK
interface that can be used with an external Alert on LAN* (or Alert on LAN 2*) enabled LAN
Controller. This separate interface is required, since devices on the system SMBus will be powered
down during some low power states.
The basic scheme is for the ICH2 integrated LAN Controller to send a prepared Ethernet message
to a network management console. The prepared message is stored in the non-volatile EEPROM
that is connected to the ICH2.
Messages are sent by the LAN Controller either because a specific event has occurred or they are
sent periodically (also known as a heartbeat). The event and heartbeat messages have the exact
same format. The event messages are sent based on events occurring. The heartbeat messages are
sent every 30 to 32 seconds. When an event occurs, the ICH2 sends a new message and increments
the SEQ[3:0] field. For heartbeat messages, the sequence number does not increment.
If the policy is for the ICH2 to reboot the system after a hardware lockup, the ICH2 does not
immediately send an Alert on LAN* message. It first attempts to reboot the processor and let the
BIOS perform the appropriate recovery (and potentially send the message). However, if the boot
fails, the ICH2 sends the message.
If the policy is for the ICH2 not to reboot after a hardware lockup, the ICH2 sends an Alert on
LAN* message with the Watchdog (WD) Event Status bit set. This message is sent as soon as the
lockup is detected. The message is sent with the next incremented sequence number. If a system is
locked, the ICH2 continues sending the Alert on LAN* messages every heartbeat period
(30–32 seconds) unless one of the following occurs:
• The system is suspended via a PowerButton Override.
• The NO_REBOOT bit (D31:F0, offset D4h, bit 1) is set and the system is reset using PWROK,
or the system is reset remotely by SMLINK SMBus Slave write and BIOS clears the
SECOND_TO_STS bit before a TCO timeout can occur.
• The NO_REBOOT bit (D31:F0, offset D4h, bit 1) is not set causing the system to reboot
automatically.
If another event occurs prior to a power button override, the ICH2 will send another Alert on LAN*
message with the next incremented sequence number and appropriate status bit set.
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82801BA ICH2 and 82801BAM ICH2-M Datasheet