82801BA Datasheet, PDF (170/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
5.16 USB Controller (Device 31:Functions 2 and 4)
The ICH2 contains two USB Host Controllers. Each Host Controller includes a root hub with two
separate USB ports each, for a total of 4 USB ports. The ICH2 Host Controllers support the
standard Universal Host Controller Interface (UHCI) Rev 1.1.
Overcurrent detection on all 4 USB ports is supported. The overcurrent inputs are 5V-tolerant, and
can be used as GPIs if not needed.
The ICH2’s USB controllers are arbitrated as differently than standard PCI devices to improve
arbitration latency.
5.16.1 Data Structures in Main memory
This section describes the details of the data structures used to communicate control, status, and
data between software and the ICH2: Frame Lists, Transfer Descriptors, and Queue Heads. Frame
Lists are aligned on 4-KB boundaries. Transfer Descriptors and Queue Heads are aligned on
16-byte boundaries.
5.16.1.1 Frame List Pointer
The frame list pointer contains a link pointer to the first data object to be processed in the frame, as
well as the control bits defined in Table 5-56.
Table 5-56. Frame List Pointer Bit Description
Bit
Description
31:4
Frame List Pointer (FLP). This field contains the address of the first data object to be processed in
the frame and corresponds to memory address signals [31:4], respectively.
3:2 Reserved. These bits must be written as 0.
QH/TD Select (Q). This bit indicates to the hardware whether the item referenced by the link pointer
is a TD (Transfer Descriptor) or a QH (Queue Head). This allows the ICH2 to perform the proper type
1 ^{of processing on the item after it is fetched.}
1 = QH
0 = TD
Terminate (T). This bit indicates to the ICH2 whether the schedule for this frame has valid entries in
it.
0 _{1 = Empty Frame (pointer is invalid).}
0 = Pointer is valid (points to a QH or TD).
5-108
82801BA ICH2 and 82801BAM ICH2-M Datasheet