82801BA Datasheet, PDF (55/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Power Planes and Pin States
Table 3-4. Power Plane and States for Output and I/O Signals
Signal Name
Power
Plane
Reset Signal
During Reset
Immediately
after Reset
C3
(ICH2-M)
AD[31:0]
C/BE#[3:0]
CLKRUN# (ICH2-M)
DEVSEL#
FRAME#
GNT[0:5]#
GNT[A:B]#
IRDY#, TRDY#
PAR
PCIRST#
PERR#
PLOCK#
STOP#
LAD[3:0]
LFRAME#
EE_CS
EE_DOUT
EE_SHCLK
LAN_RSTSYNC
LAN_TXD[2:0]
PCI Bus
Main I/O
Main I/O
Main I/O
Main I/O
Main I/O
Main I/O
Main I/O
Main I/O
Main I/O
Resume I/O
Main I/O
Main I/O
Main I/O
PCIRST#
PCIRST#
PCIRST#
PCIRST#
PCIRST#
PCIRST#
PCIRST#
PCIRST#
PCIRST#
RSMRST#
PCIRST#
PCIRST#
PCIRST#
High-Z
High-Z
Low
High-Z
High-Z
High
High-Z
High-Z
High-Z
Low
High-Z
High-Z
High-Z
Undefined
Undefined
Low
High-Z
High-Z
High
High
High-Z
Undefined
High
High-Z
High-Z
High-Z
Defined
Defined
Defined
High-Z
High-Z
High
High
High-Z
Defined
High
High-Z
High-Z
High-Z
LPC Interface
Main I/O
Main I/O
PCIRST#
PCIRST#
High
High
High
High
High
High
LAN Connect and EEPROM Interface
LAN I/O
LAN I/O
LAN I/O
LAN I/O
LAN I/O
RSM_PWROK
(ICH2)
LAN_PWROK
(ICH2-M)
RSM_PWROK
(ICH2)
LAN_PWROK
(ICH2-M)
RSM_PWROK
(ICH2)
LAN_PWROK
(ICH2-M)
RSM_PWROK
(ICH2)
LAN_PWROK
(ICH2-M)
RSM_PWROK
(ICH2)
LAN_PWROK
(ICH2-M)
Low
High
Low
High
Low
Running
Defined
Running
Defined
Running
Defined
Defined
Defined
Defined
Defined
S1
Defined
Defined
High-Z
High-Z
High
High
High-Z
Defined
High
High-Z
High-Z
High-Z
Defined
High
Defined
Defined
Defined
Defined
Defined
S3
S4/S5
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Low
Low
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Note 4 Note 4
Note 4 Note 4
Note 4 Note 4
Note 4 Note 4
Note 4 Note 4
82801BA ICH2 and 82801BAM ICH2-M Datasheet
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