82801BA Datasheet, PDF (415/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

AC’97 Modem Controller Registers (D31:F6)
Bit
Description
31:16
15:8
7:1
0
Hardwired to 0s
Base Address—R/W. These bits are used in the I/O space decode of the Modem interface
registers. The number of upper bits that a device actually implements depends on how much of the
address space the device will respond to. For the AC ‘97 Modem, the upper 16 bits are hardwired to
0, while bits 15:8 are programmable. This configuration yields a maximum I/O block size of
256 bytes for this base address.
Note: This address must align to a 256-byte boundary.
Reserved. Read as 0
Resource Type Indicator (RTE)—RO. This bit is set to one, indicating a request for I/O space.
14.1.11
MBAR—Modem Base Address Register (Modem—D31:F6)
Address Offset: 14h–17h
Default Value: 00000001h
Attribute:
Size:
R/W
32 bits
The Modem function uses PCI Base Address register #1 to request a contiguous block of I/O space
that is to be used for the Modem software interface. The Modem Bus Mastering register space
requires 128 bytes of I/O space. All Modem registers reside in the controller, therefore cycles are
NOT forwarded over the AC-link to the codec.
Bit
Description
31:16
15:7
6:1
0
Hardwired to 0s
Base Address—R/W. These bits are used in the I/O space decode of the Modem interface
registers. The number of upper bits that a device actually implements depends on how much of the
address space the device will respond to. For the AC ‘97 Modem, the upper 16 bits are hardwired to
0, while bits 15:7 are programmable. This configuration yields a maximum I/O block size of
128 bytes for this base address.
Note: This address must align to a 128-byte boundary.
Reserved. Read as 0
Resource Type Indicator (RTE)—RO. This bit is set to one, indicating a request for I/O space.
14.1.12 SVID—Subsystem Vendor ID (Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
2Dh–2Ch
0000h
No
Attribute:
Size:
Power Well:
Write-Once
16 bits
Core
The SVID register, in combination with the Subsystem ID register, enable the operating
environment to distinguish one audio subsystem from the other(s). This register is implemented as
write-once register. Once a value is written to the register, the value can be read back. Any
subsequent writes will have no effect.
Bit
Description
15:0 Subsystem Vendor ID Value—Read/Write-Once.
82801BA ICH2 and 82801BAM ICH2-M Datasheet
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