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82801BA Datasheet, PDF (198/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile
Functional Description
Table 5-82. I2C Block Read
Bit
1
2:8
9
10
11:18
19
20:27
28
29:36
37
38
39:45
46
47
48:55
56
57:64
65
-
-
-
-
Description
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Send DATA0 register
Acknowledge from slave
Send DATA1 register
Acknowledge from slave
Repeated start
Slave Address - 7 bits
Read
Acknowledge from slave
Data byte from slave
Acknowledge
Data byte 2 from slave - 8 bits
Acknowledge
Data bytes from slave / Acknowledge
Data byte N from slave - 8 bits
NOT Acknowledge
Stop
The ICH2 continues reading data from the peripheral until the NAK is received.
5.17.1.2 I2C Behavior
When the I2C_EN bit is set, the ICH2 SMBus logic is instead set to communicate with I2C devices.
This forces the following changes:
1. The Process Call command will skip the Command code (and its associated acknowledge)
2. The Block Write command will skip sending the Byte Count (DATA0)
In addition, the ICH2 supports the new I2C Read command. This is independent of the I2C_EN bit.
5.17.1.3
Heartbeat for Use With the External LAN Controller
This method allows the ICH2 to send messages to an external LAN Controller when the processor
is otherwise unable to do so. It uses the SMLINK I/F between the ICH2 and the external LAN
Controller. The actual Heartbeat message is a Block Write. Only 8 bytes are sent.
5-136
82801BA ICH2 and 82801BAM ICH2-M Datasheet