82801BA Datasheet, PDF (123/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
5.9.3 Stop Frame
After all data frames, a Stop Frame is driven by ICH2. The SERIRQ signal is driven low by ICH2
for 2 or 3 PCI clocks. The number of clocks is determined by the SERIRQ configuration register.
The number of clocks determines the next mode.
Table 5-28. Stop Frame Explanation
Stop Frame Width
2 PCI clocks
3 PCI clocks
Next Mode
Quiet Mode. Any SERIRQ device may initiate a Start Frame
Continuous Mode. Only the host (ICH2) may initiate a Start Frame
5.9.4
Specific Interrupts not Supported via SERIRQ
There are three interrupts seen through the serial stream that are not supported by the ICH2. These
interrupts are generated internally and are not sharable with other devices within the system. These
interrupts are:
• IRQ0. Heartbeat interrupt generated off of the internal 8254 counter 0.
• IRQ8#. RTC interrupt can only be generated internally.
• IRQ13. Floating point error interrupt generated off of the processor assertion of FERR#.
ICH2 ignores the state of these interrupts in the serial stream, and does not adjust their level based
on the level seen in the serial stream. In addition, the interrupts IRQ14 and IRQ15 from the serial
stream are treated differently than their ISA counterparts. These two frames are not passed to the
Bus Master IDE logic. The Bus Master IDE logic expects IDE to be behind the ICH2.
82801BA ICH2 and 82801BAM ICH2-M Datasheet
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