82801BA Datasheet, PDF (155/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
5.12.13 Clock Generators
The clock generator is expected to provide the frequencies shown in Table 5-51.
Table 5-51. ICH2 Clock Inputs
Clock
Domain
Frequency
CLK66
66 MHz
PCICLK
33 MHz
CLK48
48 MHz
CLK14
14.318 MHz
AC_BIT_CLK 12.288 MHz
APICCLK
16.67 MHz
or 33 MHz
LAN_CLK
0.8 to
50 MHz
Source
Main Clock
Generator
Main Clock
Generator
Main Clock
Generator
Main Clock
Generator
AC’97 Codec
Main Clock
Generator
LAN Connect
Usage
Should be running in all Cx states. Stopped in S3 ~ S5
based on SLP_S3# assertion.
82801BAM ICH2-M: It is also stopped in the S1 state based
on the assertion of SLP_S1# assertion.
Free-running PCI Clock to ICH2. Stopped in S3 ~ S5 based
on SLP_S3# assertion.
82801BAM ICH2-M: Free-running (not affected by
STP_PCI#) PCI Clock to ICH2-M. This is not the system PCI
clock. This clock must keep running in S0 while the system
PCI clock may stop based on CLKRUN# protocol . This clock
is stopped in S1 based on SLP_S1# assertion. Stopped in
S3 ~ S5 based on SLP_S3# assertion.
Used by USB Controllers. Stopped in S3 ~ S5 based on
SLP_S3# assertion.
82801BAM ICH2-M: This clock is also stopped in S1 based
on SLP_S1# assertion.
Used by ACPI timers. Stopped in S3 ~ S5 based on
SLP_S3# assertion.
82801BAM ICH2-M: This clock is also stopped in S1 based
on SLP_S1# assertion.
AC’97 Link. Control policy is determined by the clock source.
Used for ICH2-processor interrupt messages. Should be
running in C0, C1 and C2. Stopped in S3 ~ S5 based on
SLP_S3# assertion.
82801BAM ICH2-M: Also stopped in C3 based on
STP_CPU# assertion. Stopped in S1 based on SLP_S1#
assertion.
LAN Connect link. Control policy is determined by the clock
source.
5.12.13.1 Clock Control Signals from ICH2-M to Clock Synthesizer
(82801BAM ICH2-M only)
The clock generator is assumed to have direct connect from the following ICH2-M signals:
• STP_CPU# Stops CPU clocks in C3 state
• STP_PCI# Stops system PCI clocks (not the ICH2-m free-running 33 MHz clock) due to
CLKRUN# protocol
• SLP_S1# Stops all clocks in S1
82801BA ICH2 and 82801BAM ICH2-M Datasheet
5-93