82801BA Datasheet, PDF (455/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Electrical Characteristics
Table 16-18. Power Sequencing and Reset Signal Timings (Continued)
Sym
Parameter
Min Max Units
t176 Vcc supplies active to PWROK, VRMPWRGD
(ICH2) active
10
-
ms
t176
(ICH2-M)
Vcc supplies active to PWROK, VGATE active
10
-
ms
t177
PWROK, VRMPWRGD active to SUS_STAT#
inactive
32
34 RTCCLK
t177
PWROK, VGATE active to SUS_STAT#
inactive
32
34 RTCCLK
t178 SUS_STAT# inactive to PCIRST# inactive
1
3 RTCCLK
t179 AC_RST# active low pulse width
1
us
t180 AC_RST# inactive to BIT_CLK startup delay 162.8
ns
Notes
Fig
16-18,
16-21,
16-25
16-19
16-20
16-22
16-18,
16-21
16-25
16-18
16-20
16-22
16-18,
16-19
16-21,
16-22
16-25,
16-26
NOTES:
1. The V5Ref supply must power up before or simultaneous with its associated 3.3V supply, and must power
down simultaneous with or after the 3.3V supply. See Section 2.20.4 for details.
2. The associated 3.3V and 1.8V supplies are assumed to power up or down together. The difference between
the levels of the 3.3V and 1.8V supplies must never be greater than 2.0V.
3. 82801BA ICH2: The VccSus supplies must never be active while the VccRTC supply is inactive. Likewise,
the Vcc supplies must never be active while the VccSus supplies are inactive.
4. 82801BAM ICH2-M: The VccSus supplies must never be active while the VccRTC supply is inactive.
Likewise, the Vcc or VccLAN supplies must never be active while the VccSus supplies are inactive, and the
Vcc supplies must never be active while the VccLAN supplies are inactive.
82801BA ICH2 and 82801BAM ICH2-M Datasheet
16-15