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82801BA Datasheet, PDF (222/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile | |||
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Register and Memory Mapping
Table 6-2. Fixed I/O Ranges Decoded by ICH2 (Continued)
I/O Address
Read Target
Write Target
Internal Unit
75h
76h
77h
80h
81hâ83h
84hâ86h
87h
88h
89hâ8Bh
8Châ8Eh
08Fh
90hâ91h
92h
93hâ9Fh
A0hâA1h
A4hâA5h
A8hâA9h
AChâADh
B0hâB1h
B2hâB3h
B4hâB5h
B8hâB9h
BChâBDh
C0hâD1h
D2hâDDh
DEhâDFh
F0h
170hâ177h
1F0hâ1F7h
376h
3F6h
4D0hâ4D1h
CF9h
RTC Controller
RTC Controller
RTC Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
RESERVED
DMA Controller
See Note 3
IDE Controller2
IDE Controller1
IDE Controller2
IDE Controller1
Interrupt Controller
Reset Generator
RTC Controller
NMI and RTC Controller
RTC Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller and LPC or PCI
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
FERR#/IGNNE# / Interrupt
Controller
IDE Controller1
IDE Controller2
IDE Controller1
IDE Controller2
Interrupt Controller
Reset Generator
RTC
RTC
RTC
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
processor I/F
DMA
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Power Management
Interrupt
Interrupt
Interrupt
DMA
DMA
DMA
processor interface
Forwarded to IDE
Forwarded to IDE
Forwarded to IDE
Forwarded to IDE
Interrupt
processor interface
NOTES:
1. Only if IDE Standard I/O space is enabled for Primary Drive. Otherwise, the target is PCI.
2. Only if IDE Standard I/O space is enabled for Secondary Drive. Otherwise, the target is PCI.
3. If POS_DEC_EN bit is enabled, reads from F0h will not be decoded by the ICH2. If POS_DEC_EN is not
enabled, reads from F0h will forward to LPC.
6-4
82801BA ICH2 and 82801BAM ICH2-M Datasheet
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