82801BA Datasheet, PDF (342/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

LPC Interface Bridge Registers (D31:F0)
9.9.3
9.9.4
9.9.5
9.9.6
TCO1_TMR—TCO Timer Initial Value Register
I/O Address:
Default Value:
Lockable:
TCOBASE +01h
0004h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
Bit
Description
7:6 Reserved
TCO Timer Initial Value. Value that is loaded into the timer each time the TCO_RLD register is
5:0 written. Values of 0h–3h will be ignored and should not be attempted. The timer is clocked at
approximately 0.6 seconds, and this allows time-outs ranging from 2.4 seconds to 38 seconds.
TCO1_DAT_IN—TCO Data In Register
I/O Address:
Default Value:
Lockable:
TCOBASE +02h
0000h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
Bit
Description
7:0
TCO Data In Value. Data Register for passing commands from the OS to the SMI handler. Writes
to this register will cause an SMI and set the OS_TCO_SMI bit in the TCO_STS register.
TCO1_DAT_OUT—TCO Data Out Register
I/O Address:
Default Value:
Lockable:
TCOBASE +03h
0000h
No
Attribute:
Size:
Power Well:
R/W
8-bit
Core
Bit
Description
TCO Data Out Value. Data Register for passing commands from the SMI handler to the OS.
7:0 Writes to this register will set the TCO_INT_STS bit in the TCO_STS register. It will also cause an
interrupt, as selected by the TCO_INT_SEL bits.
TCO1_STS—TCO1 Status Register
I/O Address:
Default Value:
Lockable:
TCOBASE +04h
0000h
No
Attribute:
Size:
Power Well:
R/WC RO
16-bit
Core
(Except bit 7, in RTC)
Bit
15:13
12
11
Description
Reserved
Hub Interface SERR Status (HUBSERR_STS)—R/WC.
1 = ICH2 received an SERR# message via the hub interface. The software must read the memory
controller hub (or its equivalent) to determine the reason for the SERR#.
0 = Software clears this bit by writing a 1 to the bit position.
Hub Interface NMI Status (HUBNMI_STS)—R/WC.
1 = ICH2 received an NMI message via the hub interface. The software must read the memory
controller hub (or its equivalent) to determine the reason for the NMI.
0 = Software clears this bit by writing a 1 to the bit position.
9-80
82801BA ICH2 and 82801BAM ICH2-M Datasheet