82801BA Datasheet, PDF (454/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Electrical Characteristics
Table 16-16. LPC Timing
Sym
t150
t151
t152
t153
t154
t155
t156
t157
Parameter
LAD[3:0] Valid Delay from PCICLK Rising
LAD[3:0] Output Enable Delay from PCICLK Rising
LAD[3:0] Float Delay from PCICLK Rising
LAD[3:0] Setup Time to PCICLK Rising
LAD[3:0] Hold Time from PCICLK Rising
LDRQ[1:0]# Setup Time to PCICLK Rising
LDRQ[1:0]# Hold Time from PCICLK Rising
LFRAME# Valid Delay from PCICLK Rising
Min Max Units Notes Fig
2
11
ns
2
ns
28
ns
7
ns
0
ns
12
ns
0
ns
2
12
ns
16-3
16-7
16-5
16-4
16-4
16-4
16-4
16-3
Table 16-17. Miscellaneous Timings
Sym
Parameter
t160 SERIRQ Setup Time to PCICLK Rising
t161 SERIRQ Hold Time from PCICLK Rising
t162 RI#, EXTSMI#, GPI, USB Resume Pulse Width
t163 SPKR Valid Delay from OSC Rising
t164 SERR# Active to NMI Active
t165 IGNNE# Inactive from FERR# Inactive
Min Max Units
Notes Fig
7
ns
0
ns
16-4
16-4
2
RTCCLK
200
ns
16-6
16-3
200
ns
230
ns
Table 16-18. Power Sequencing and Reset Signal Timings
Sym
Parameter
Min Max
t170 VccRTC active to RTCRST# inactive
5
-
t171
V5RefSus active to VccSus3_3, VccSus1_8
active
0
-
t172
VccRTC supply active to VccSus supplies
active
0
-
t173 VccSus supplies active to RSM_PWROK
(ICH2) active, RSMRST# inactive
10
-
t173
(ICH2-M)
VccSus supplies active to RSMRST# inactive
5
-
t174 V5Ref active to Vcc3_3, Vcc1_8 active
0
-
t175
(ICH2)
VccSus supplies active to Vcc supplies active
0
-
t175a VccSus supplies active to VccLAN supplies
(ICH2-M) active
0
-
t175b VccLAN supplies active to LAN_PWROK
(ICH2-M) active
10
-
t175c
(ICH2-M)
VccLAN supplies active to Vcc supplies active
0
-
Units
ms
ms
ms
ms
ms
ms
Notes
1, 2
3
1, 2
Fig
16-18,
16-19
16-18,
16-19
16-18,
16-19
16-18,
16-21
16-19
16-22
16-18,
16-19
ms 3
16-18
ms
3
16-19
ms
16-19
16-20
ms
16-19
16-14
82801BA ICH2 and 82801BAM ICH2-M Datasheet