82801BA Datasheet, PDF (135/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
Table 5-37. State Transition Rules for ICH2
Present State
G0/S0/C0
G0/S0/C1
G0/S0/C2
G0/S0/C3
(ICH2-M only)
G1/S1,
G1/S3, or
G1/S4
G2/S5
Transition Trigger
• Processor halt instruction
• Level 2 Read
• Level 3 Read
• SLP_EN bit set
• Power Button Override
• Mechanical Off/Power Failure
• Any Enabled Break Event
• STPCLK# goes active
• Power Button Override
• Power Failure
• Any Enabled Break Event
• STPCLK# goes inactive and previously
in C1
• Power Button Override
• Power Failure
• Any Enabled Break Event
• STPCLK# goes inactive and previously
in C1
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Failure
G3
• Power Returns
Next State
• G0/S0/C1
• G0/S0/C2
• G0/S0/C3
• G1/Sx or G2/S5state
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C2
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C1
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C1
• G2/S5
• G3
• G0/S0/C0 (For ICH2-M, see note 2)
• G2/S5
• G3
• G0/S0/C0 (For ICH2-M, see note 2)
• G3
• Optional to go to S0/C0 (reboot) or G2/
S5 (stay off until power button pressed or
other wake event). (For ICH2 and
ICH2-M, see Note 1) (For ICH2-M, see
note 2)
NOTES:
1. Some wake events can be preserved through power failure.
2. 82801BAM ICH2-M, transitions from the S1-S5 or G3 states to the S0 state are deferred until BATLOW# is
inactive.
82801BA ICH2 and 82801BAM ICH2-M Datasheet
5-73