82801BA Datasheet, PDF(227/498 Page) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

82801BA Datasheet, PDF (227/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

◁

LAN Controller Registers (B1:D8:F0)

LAN Controller Registers (B1:D8:F0) 7

The ICH2 integrated LAN Controller appears to reside at PCI Device 8, Function 0 on the

secondary side of the ICH2âs virtual PCI-to-PCI Bridge (See Table 5.1.2). This is typically Bus 1,

but may be assigned a different number depending upon system configuration. The LAN

Controller acts as both a master and a slave on the PCI bus. As a master, the LAN Controller

interacts with the system main memory to access data for transmission or deposit received data. As

a slave, some of the LAN Controllerâs control structures are accessed by the host processor to read

or write information to the on-chip registers. The processor also provides the LAN Controller with

the necessary commands and pointers that allow it to process receive and transmit data.

7.1

PCI Configuration Registers (B1:D8:F0)

Note: Registers that are not shown should be treated as Reserved (See Section 6.2 for details).

.

Table 7-1. PCI Configuration Map (LAN ControllerâB1:D8:F0)

Offset

00â01h

02â03h

04â05h

06â07h

08h

0Ah

0Bh

0Dh

0Eh

10â13h

14â17h

2Câ2Dh

2Eâ2Fh

34h

3Ch

3Dh

3Eh

3Fh

DCh

DDh

Mnemonic

VID

Register Name/Function

Vendor ID

DID

Device ID

PCICMD

PCI Device Command Register

PCISTS

PCI Device Status Register

REVID

Revision ID

SCC

Sub Class Code

BCC

Base Class Code

PMLT

PCI Master Latency Timer

HEADTYP

Header Type

CSR_MEM_BASE CSR Memory-mapped Base Address

CSR_IO_BASE CSR I/O-mapped Base Address

SVID

Subsystem Vendor ID

SID

Subsystem ID

CAP_PTR

Capabilities Pointer

INT_LN

Interrupt Line

INT_PN

Interrupt Pin

MIN_GNT

Minimum Grant

MAX_LAT

Maximum Latency

CAP_ID

Capability ID

NXT_PTR

Next Item Pointer

DEâDFh

PM_CAP

Power Management Capabilities

E0âE1h

E3h

PMCSR

DATA

Power Management Control/Status

Data

Default

8086h

2449h

0000h

0290h

Note 1

00h

02h

00h

00h

0008h

0001h

0000h

0000h

DCh

00h

01h

08h

38h

01h

00h

FE21h (ICH2)

7E21 (ICH2-M)

0000h

00h

Type

RO

RO

R/W

R/W

RO

RO

RO

R/W

RO

R/W

R/W

RO

RO

RO

R/W

RO

RO

RO

RO

RO

RO

R/W

RO

NOTE: Refer to the Specification Update for the value of the Revision ID Register.

82801BA ICH2 and 82801BAM ICH2-M Datasheet

7-1

▷