82801BA Datasheet, PDF (280/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

LPC Interface Bridge Registers (D31:F0)
Bit
Description
ADLIB Address Range Enable (ADLIB_LPC_EN)—R/W.
7
0 = Disable.
1 = Enables the decoding of the I/O locations 388h–38Bh to the LPC interface.
MSS Address Range Enable (MSS_LPC_EN)—R/W.
6
0 = Disable.
1 = Enables the decoding of the MSS range to the LPC interface. This range is selected in the
LPC_Sound Decode Range Register.
MIDI Address Range Enable (MIDI_LPC_EN)—R/W.
5
0 = Disable.
1 = Enables the decoding of the MIDI range to the LPC interface. This range is selected in the
LPC_Sound Decode Range Register.
Sound Blaster Address Range Enable (SB16_LPC_EN)—R/W.
4
0 = Disable.
1 = Enables the decoding of the SB16 range to the LPC interface. This range is selected in the
LPC_Sound Decode Range Register.
FDD Address Range Enable (FDD_LPC_EN)—R/W.
3
0 = Disable.
1 = Enables the decoding of the FDD range to the LPC interface. This range is selected in the
LPC_FDD/LPT Decode Range Register.
LPT Address Range Enable (LPT_LPC_EN)—R/W.
2
0 = Disable.
1 = Enables the decoding of the LPT range to the LPC interface. This range is selected in the
LPC_FDD/LPT Decode Range Register.
COM B Address Range Enable (COMB_LPC_EN)—R/W.
1
0 = Disable.
1 = Enables the decoding of the COMB range to the LPC interface. This range is selected in the
LPC_COM Decode Range Register.
Com A Address Range Enable (COMA_LPC_EN)—R/W.
0
0 = Disable.
1 = Enables the decoding of the COMA range to the LPC interface. This range is selected in the
LPC_COM Decode Range Register.
9-18
82801BA ICH2 and 82801BAM ICH2-M Datasheet