82801BA Datasheet, PDF (181/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

Functional Description
Table 5-66. USB Schedule List Traversal Decision Table (Continued)
Q
Context
QH.Q
QH.T
QE.Q
QE.T
TD.Vf
TD.Q
TD.T
1
1
0
0
0
0
x
x
1
1
0
x
1
x
x
x
Description
• In Queue. Use QE.LP to get TD.
• execute TD. Update QE.LP with
TD.LP.
• Use QH.LP to get next (QH+QE).
• In Queue. Empty queue.
• Use QH.LP to get next (QH+QE)
5.16.3 Data Encoding and Bit Stuffing
The USB employs NRZI data encoding (Non-Return to Zero Inverted) when transmitting packets.
In NRZI encoding, a 1 is represented by no change in level and a 0 is represented by a change in
level. A string of zeros causes the NRZI data to toggle each bit time. A string of ones causes long
periods with no transitions in the data. To ensure adequate signal transitions, bit stuffing is
employed by the transmitting device when sending a packet on the USB. A 0 is inserted after every
six consecutive 1s in the data stream before the data is NRZI encoded to force a transition in the
NRZI data stream. This gives the receiver logic a data transition at least once every seven bit times
to guarantee the data and clock lock. A waveform of the data encoding is shown in Figure 5-18.
Figure 5-18. USB Data Encoding
CLOCK
Data
Bit Stuffed Data
NRZI Data
Bit stuffing is enabled beginning with the Sync Pattern and throughout the entire transmission. The
data “one” that ends the Sync Pattern is counted as the first one in a sequence. Bit stuffing is always
enforced, without exception. If required by the bit stuffing rules, a zero bit will be inserted even if
it is the last bit before the end-of-packet (EOP) signal.
82801BA ICH2 and 82801BAM ICH2-M Datasheet
5-119