82801BA Datasheet, PDF (393/498 Pages) Intel Corporation – Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile

SMBus Controller Registers (D31:F3)
12.2.10 SMLINK_PIN_CTL—SMLINK Pin Control Register
Register Offset: 0Eh
Default Value: See Below
Attribute:
Size:
Read/Write
8 bits
Note: This register is in the resume well and is reset by RSMRST#.
Bit
Description
7:3 Reserved
SMLINK Clock Pin Control (SMLINK_CLK_CTL)—R/W.
2
1 = No functional impact on the SMLINK[0] pin. (default)
0 = ICH2 will drive the SMLINK[0] pin low, independent of the what the other SMLINK logic would
otherwise indicate for the SMLINK[0] pin.
SMLINK[1] Pin Current Status (SMLINK[1]_CUR_STA)—RO. This read-only bit has a default
value that is dependent on an external signal level. This pin returns the value on the SMLINK[1]
1
pin. This allows software to read the current state of the pin.
1 = SMLINK[1] pin is high
0 = SMLINK[1] pin is low
SMLINK[0] Pin Current Status (SMLINK[0]_CUR_STA)—RO. This read-only bit has a default
value that is dependent on an external signal level. This pin returns the value on the SMLINK[0]
0
pin. This allows software to read the current state of the pin.
1 = SMLINK[0] pin is high
0 = SMLINK[0] pin is low
12.2.11 SMBUS_PIN_CTL—SMBus Pin Control Register
Register Offset: 0Fh
Default Value: See Below
Attribute:
Size:
Read/Write
8 bits
Note: This register is in the resume well and is reset by RSMRST#.
Bit
Description
7:3 Reserved
SMBCLK Pin Control (SMBCLK_CTL)—R/W.
2
1 = No functional impact on the SMBCLK pin. (default)
0 = ICH2 drives the SMBCLK pin low, independent of the what the other SMB logic would
otherwise indicate for the SMBCLK pin.
SMBDATA Pin Current Status (SMBDATA_CUR_STA)—RO. This read-only bit has a
default value that is dependent on an external signal level. This pin returns the value on
1
the SMBDATA pin. This allows software to read the current state of the pin.
1 = SMBDATA pin is high
0 = SMBDATA pin is low
SMBCLK Pin Current Status (SMBCLK_CUR_STA)—RO. This read-only bit has a
default value that is dependent on an external signal level. This pin returns the value on
0
the SMBCLK pin. This allows software to read the current state of the pin.
1 = SMBCLK pin is high
0 = SMBCLK pin is low
82801BA ICH2 and 82801BAM ICH2-M Datasheet
12-11