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DS643 Datasheet, PDF (82/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support
LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Available PHY Interface by Device
Table 58 summarizes the available PHY interfaces available for each FPGA family and memory combination.
Table 58: PHY Layer by Xilinx FPGA Family and Memory Type
FPGA Family
Virtex-6
Virtex-5
Virtex-4
Spartan-3
Spartan-3E
Spartan-3A
Spartan-3AN
Spartan-3A DSP
DDR3
MIG-Based Virtex-6
FPGA DDR3 PHY(1)
Memory Type
DDR2
DDR
MIG-Based Virtex-6
FPGA DDR2 PHY(1)
/
MIG-Based Virtex-5
FPGA DDR2 PHY(1)
Static PHY
MIG-Based Virtex-5
FPGA DDR PHY(1)
Static PHY
MIG-Based Virtex-4
FPGA DDR2 PHY (1)
Static PHY
MIG-Based Virtex-4
FPGA DDR PHY (1)
Static PHY
MIG-Based Spartan-3
FPGA DDR2 PHY(1)
Static PHY
MIG-Based Spartan-3
FPGA DDR PHY(1)
Static PHY
SDRAM
/
SDRAM PHY(1)
SDRAM PHY(1)
SDRAM PHY(1)
Notes:
1. Default selection.
Connecting Memory to the PHY Interface
The PHY interface permits connections to 8-, 16-, 32-, and 64-bit SDRAM, DDR, or DDR2 memories on
Spartan-3/Virtex-4/Virtex-5 FPGAs. The PHY interface permits connections to 8-,16-, and 32-bit DDR2 or DDR3 on
Virtex-6 FPGAs.
Table 59 lists the unique signals and parameters for each available PHY layer (excluding standard memory and
clock signals).
Table 59: Signals and Parameters per PHY Layer
PHY Layer
Signals
MIG-Based Virtex-6 FPGA
DDR2/DDR3 PHY
MPMC_Clk_Mem
MPMC_Clk_200MHz
MPMC_Clk_Rd_Base
MIG-Based Virtex-5 FPGA DDR2 PHY
MPMC_Clk0_DIV2
MPMC_Clk_200MHz
MPMC_Idelayctrl_Rdy_I (optional)
MPMC_Idelayctrl_Rdy_O
(optional)
MIG-Based Virtex-5 FPGA DDR PHY
MIG-Based Virtex-4 FPGA DDR2 PHY
MIG-Based Virtex-4 FPGA DDR PHY
MPMC_Clk_200MHz
MPMC_Idelayctrl_Rdy_I (optional)
MPMC_Idelayctrl_Rdy_O
(optional)
MIG-Based Spartan-3 FPGA DDR PHY
DDR_DQS_Div_I
DDR_DQS_Div_O
MIG-Based Spartan-3 FPGA DDR2
PHY
DDR2_DQS_Div_I
DDR2_DQS_Div_O
Parameters
C_MEM_NDQS_COL0
C_MEM_DQS_LOC_COL0
C_IODELAY_GRP
C_NUM_IDELAYCTRL
C_IDELAYCTRL_LOC
C_NUM_IDELAYCTRL
C_IDELAYCTRL_LOC
N/A
N/A
DS643 February 22, 2013
www.xilinx.com
82
Product Specification