DS643 Datasheet, PDF (2/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Features (continued)
• Static Physical (PHY) interface alternative to the MIG-based PHY
• User configuration of arbitration algorithms
• Customizable Interfaces: XCL, LocalLink (using SDMA), PLB v4.6 with Xilinx simplifications, NPI, MCB,
MIB/PPC440MC, and VFBC
Note: Some features might have limitations or might not be available in some architectures. Review the MPMC
architecture-specific features in Table 1 for more information.
MPMC Architecture-Specific Features
Table 1 lists the MPMC architecture-specific features.
Table 1: MPMC Architecture-Specific Features
Feature
PLB PIM
XCL PIM
SDMA PIM ⁽³⁾
PPC440MC PIM
VFBC PIM
NPI PIM
MCB PIM
Maximum Number of Ports
SDRAM (Width)⁽²⁾
DDR SDRAM (Width)⁽²⁾
LPDDR SDRAM (Width)⁽²⁾
DDR2 SDRAM (Width)⁽²⁾
DDR3 SDRAM (Width)⁽²⁾
Debug Registers
ECC
Static PHY
MIG PHY (v.3.61)
Spartan-6 FPGA MCB (Controller and PHY)
Performance Monitors
MIG v3.9 Support
Spartan-3
✓
✓
✓
✓
✓
8
8, 16, 32, 64
8, 16, 32, 64
8, 16, 32, 64
✓
✓
✓
✓
✓
Architecture
Virtex-4
Virtex-5
Spartan-6
✓
✓
✓
✓
✓
✓
✓
✓
✓
Virtex-5 FX FPGA Only
✓
✓
✓
✓
✓
✓
✓
8
8
6, 3, 2 or 1⁽¹⁾
8, 16, 32, 64 8, 16, 32, 64
8,16,32,64 8,16,32,64
4,8,16
16
8, 16, 32, 64 8, 16, 32, 64 4, 8, 16
4, 8, 16
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
Notes:
1. Maximum Number of Ports is dependent upon the MCB Port Configuration Mode.
2. Maximum memory width might be limited by the I/O of the device.
3. SDMA support is dependent upon architecture and external memory width.
Virtex-6
✓
✓
✓
✓
✓
8
8, 16, 32
8, 16, 32
✓
✓
DS643 February 22, 2013
www.xilinx.com
2
Product Specification