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DS643 Datasheet, PDF (138/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support
LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Transmit LocalLink Interface
The Transmit LocalLink and Byteshifter logic take data from the appropriate place in memory and move the data
across the LocalLink interface. This concept is shown in Figure 22.
Note: The Src_Rdy signal does not assert unless Dst_Rdy is asserted. Designing IP that relies on Src_Rdy asserted
before asserting Dst_Rdy could result in deadlock.
In this example:
• The SDMA reads the descriptor in the address range p to p+1C and sends it to the LocalLink as the header. The
payload is 136 bytes and starts at address m+79.
• The Transmit Byteshifter sends data acknowledges to the memory controller while keeping the Src_Rdy
signal to the LocalLink deasserted, because address m+79 is not 32-word aligned.
• Data from the address range m to m+78 is discarded.
• Data is offset by 78 bytes, so the first byte of data occurs on the second byte location on the posedge of the DDR
SDRAM.
• The Transmit Byteshifter takes the posedge (x 0 1 2) and negedge (3 4 5 6) data from DDR SDRAM, which are
both present at the time, recombines them to form a new, correctly shifted word (0 1 2 3), and sends it over the
LocalLink as the payload.
• At the end of the first 32-word burst read (B32R), three bytes are left over and kept in the Byteshifter.
• When the second burst occurs, the three bytes from the Byteshifter are combined with the first byte of the
second burst and sent over LocalLink. This happens again between the second and third burst.
• The fourth burst is generated due to a second descriptor. Also, it describes a buffer that begins at an odd
boundary; for example, offset 0x7E. Bytes r0 and r1 are combined with the leftover bytes from the previous
burst, n and n+1.
• On the last word of the payload, the Rem signal is set to indicate which bytes of the word are valid. Rem is 0x3
in this example to indicate that only the first two bytes are valid.
• After byte n+1 is sent the FIFOs in MPMC, which hold all 32 words of the burst, are reset to avoid extra data
acknowledge.
• For Tx transfer, the footer is not used. The status bits are written back to the status field of the descriptor.
DS643 February 22, 2013
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Product Specification