DS643 Datasheet, PDF (130/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Note: For receive channels, STS_CTRL_APP0.SOP and STS_CTRL_APP0.EOP are set by SDMA and updated to memory
for use by the software application.
X-Ref Target - Figure 17
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
Packet 4
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
Packet 1
SOP =1 and EOP = 1
Descriptor Address =
TAILDESC_PTR
CURDESC_PTR
Register Value
SOP =1
EOP =1
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
Packet 2
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
NXTDESC_PTR
CURBUF_ADDR
CURBUF_LENGTH
STS_CTRL_APP0
APP1
APP2
APP3
APP4
Packet 3
Figure 17: Descriptors Organized Into a Buffer Ring
SOP =1
EOP =1
SOP =1
EOP =1
DS643_19_071307
DS643 February 22, 2013
www.xilinx.com
130
Product Specification