DS643 Datasheet, PDF (211/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Memory/DIMM Settings Tab
The Memory/DIMM Settings tab provides the following areas: Settings, Configuration, and Info.
Under the Settings area, selection and drop-down boxes are available where you can adjust settings such as:
• Number of DIMMs
• Memory Data Width drop-down
• ODT Setting drop-down
• Enable DQSN checkbox
• Reduced Drive Output drop-down with the options of FULL or REDUCED.
• Memory Clock Period (ps)
• Setting for Dynamic Write ODT
• Enable Write Leveling checkbox
Based on the selected device, the appropriate parameters are editable.
The Configuration area provides the following selection options:
• CE Width
• ODT Width
• Clock Width
• Sn Width
• No. of Ranks
• Registered Memory checkbox
The Info area provides the following Memory Width options:
• Memory DM Width
• Memory Address Width
• Memory Bank Address Width
• Memory DQS Width
• CAS Write Latency
Memory Part Settings Tab
The Memory Part Settings tab has two areas: Part Settings and Memory Timing Settings.
• Part Settings contains options for selecting Data Depth, Data Width, Bank, Row, and Column Bits.
• Memory Timing Settings contains memory part options.
MIG Settings Tab
The MIG Settings tab allows you to launch the MIG Tool from within the MPMC GUI in Spartan-3, Virtex-4,
Virtex-5, and Virtex-6 architectures. You can set some MIG specific parameters also. For more information about the
integrated MIG tool flow and how to set the MIG specific parameters, see MIG/MPMC Tool Flow, page 91.
MCB Tab
The MCB tab (Spartan-6 FPGAs only) lets you configure some MCB specific parameters, generally related to the
Soft Calibration Logic, and for setting the RZQ/ZIO pinout locations.
DS643 February 22, 2013
www.xilinx.com
211
Product Specification