DS643 Datasheet, PDF (169/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Table 88: 720p Line Command Packet
Command Word 0
Command Word 1
31:15
Reserved
14:0
X Size
31
Write_NotRead
30:0
Start Address
0x0000_1400
0x1000_000
Command Word 2
31:24
Reserved
23:0
Y Size
0x0000_000
Command Word 3
31:24
Reserved
23:0
Stride
0x0000_0000
• The X Size is 1280*4 bytes.
• The Y Size must be zero (denoting a single line transfer) and the Stride is ignored and can be any value.
• This example shows the Stride set to zero. The next line transfer has a Start Address of 0x1000_1400.
• Each subsequent line transfer Start Address increases by 0x1400 during each horizontal blank interval.
Simple Interlacing and De-interlacing (Field-Jam) Example
You can use the VFBC PIM for simple video processing such as interlacing or deinterlacing. Table 89 shows the
VFBC commands to write a 1080i source into a 1080p frame store.
Table 89: 1080i Top Field Command Packet
Command Word 0
Command Word 1
Command Word 2
Command Word 3
31:15
Reserved
14:0
X Size
31
Write_NotRead
30:0
Start Address
31:24
Reserved
23:0
Y Size
31:24
Reserved
23:0
Stride
0x0000_1E00
0x9000_000
0x0000_21B
0x000_3C00
In this example:
• The X Size is set to 1920*4 (1E00).
• The Y size is set to 540-1 (0x21B) because a 1080i field contains 540 lines.
• There is a different VFBC command for each top and bottom field.
• The data is interlaced into the frame store by configuring the Stride to be two line lengths (7680*2, or 0x3C00)
and offsetting the bottom field Start Address by 1920*4 (1E00).
1080p Command Example
The 1080p command is similar to the 1080i command packets, except the Stride is now a single 1080p line, 1920*4
(1E00), the same as the X Size. The Y Size is set to 1080-1 (0x437). Table 90 shows the 1080p command packet.
Table 90: 1080p Bottom Field Command Packet
Command Word 0
Command Word 1
Command Word 2
Command Word 3
31:15
Reserved
14:0
X Size
31
Write_NotRead
30:0
Start Address
31:24
Reserved
23:0
Y Size
31:24
Reserved
23:0
Stride
0x0000_1E00
0x1000_000
0x0000_437
0x0000_1E00
The Start Address is the same start address as the first line of the 1080i top field (0x1000_0000).
For more information on VFBC transfers, HDL to interface to a VFBC, and example systems using a VFBC and
multiple VFBC PIMs, see the Video Starter Kit on the Xilinx website. Reference Documents, page 215 contains a link
to that site.
DS643 February 22, 2013
www.xilinx.com
169
Product Specification