DS643 Datasheet, PDF (185/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Word Read
Figure 54 shows the following:
• A 32-bit NPI.
• A word Read transfer.
• The address acknowledged same cycle as requested.
• The address is on a word boundary.
• There are three cases of possible RdFIFO_Latency values.
X-Ref Target - Figure 54
MPMC_CLK0
AddrReq
AddrAck
Addr[31:0]
0x4
RNW
Size[3:0]
0x0
RdModWr
InitDone
RdFIFO_Empty
RdFIFO_Pop
RdFIFO_Flush
RdFIFO_Latency[1:0]
RdFIFO_Data[31:0]
RdFIFO_RdWdAddr[3:0]
RdFIFO_Latency[1:0]
RdFIFO_Data[31:0]
RdFIFO_RdWdAddr[3:0]
RdFIFO_Latency[1:0]
RdFIFO_Data[31:0]
RdFIFO_RdWdAddr[3:0]
0x0
D0
0x0
0x1
D0
0x0
0x2
D0
0x0
Figure 54: 32-Bit NPI Word Read
Case 1
Case 2
Case 3
DS643_47_072407
DS643 February 22, 2013
www.xilinx.com
185
Product Specification