DS643 Datasheet, PDF (50/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Using the MPMC in Standalone Systems
You can use the MPMC core in a processor system that is not derived from the Embedded Development Toolkit
(EDK) Xilinx Platform Studio (XPS). The general flow is to run EDK to configure and generate the MPMC core, then
export MPMC out of EDK into Project Navigator to be used as a standalone core afterwards.
Note: EDK is required to configure or generate MPMC. MPMC cannot be configured or generated without EDK. Do not attempt
to manually modify the parameters in a standalone MPMC core after it has been generated because many parameters have
dependencies that are managed by the EDK tools.
Using EDK XPS to Manage the MPMC Core
The use of MPMC in a non-EDK processor system requires the EDK XPS to manage the MPMC core. The following
steps are required:
1. Create a design using the Base System Builder (BSB) wizard, choosing a development board that uses the same
memory technology to be used in the actual design, with all other cores deselected except for the MPMC.
2. Double-click on the MPMC instance in the System Assembly view to configure MPMC using the MPMC GUI.
Parameterize the MPMC as needed, including choosing the desired PIMs.
3. Remove all unwanted peripherals and processors. Delete any external I/O associated with these peripherals.
4. In the XPS Port tab, connect all relevant PIM signals as external I/O.
5. Choose Filters > Default Connections port filter to show all MPMC ports that are usually part of a bus
connector. Each PIM I/O signal has a port number and PIM type in the GUI that corresponds to the port order
and PIM type shown in the MPMC GUI. For example, if PIM2 is configured as VFBC, the port signals would
begin with “VFBC2_”. NPI ports use the generic prefix “PIM”, such as “PIM2_”.
You can save time by selecting the relevant ports then right-clicking the Make External option.
6. Run Hardware > Generate Netlist to check for any incorrect, missing, or extraneous connections; correct as
needed.
7. Add the XPS file as a source in the ISE® Project Navigator project and build. For an instantiation template,
select the XPS project in the Hierarchy pane and then run View HDL Instantiation Template from the Processes
pane of the Design panel.
DS643 February 22, 2013
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Product Specification