DS643 Datasheet, PDF (179/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
32-Word, Burst Write
Figure 48 shows the following:
• A 64-bit NPI.
• A 32-word, burst Write transfer.
• The address is acknowledged in the same cycle as it is requested.
• The address is on a 32-word boundary.
• The RdModWr does not need to be asserted because WrFIFO_BE is 0xFF during WrFIFO_Push, and because a
32-word transfer is larger than maximum value of 4*C_MEM_DATA_WIDTH.
• The Write Transfer Safe Mode is used (AddrReq is asserted on same cycle as the last WrFIFO_push.
X-Ref Target - Figure 48
MPMC_CLK0
AddrReq
AddrAck
Addr[31:0]
0x80
RNW
Size[3:0]
0x4
RdModWr
InitDone
WrFIFO_Empty
WrFIFO_AlmostFull
WrFIFO_Push
WrFIFO_Flush
WrFIFO_Data[63:0]
WrFIFO_BE[7:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10 D11 D12 D13 D14 D15
0xFF
Figure 48: 64-Bit NPI 32-Word Burst Write
DS643_41_072407
DS643 February 22, 2013
www.xilinx.com
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Product Specification