DS643 Datasheet, PDF (202/216 Pages) Xilinx, Inc – Soft Direct Memory Access (SDMA) support

LogiCORE IP Multi-Port Memory Controller (v6.06.a)
Table 98: XCL PIM Latency and Throughput (Cont’d)
Pipeline
Settings
Memory Interface
Line Size
Port
Subtype
Default
DDR @ 83 MHz 16 bits
1
None
DDR @ 83 MHz 16 bits
1
Virtex-4/Virtex-5 FPGA Reads
Default
DDR2 @ 200 MHz 32 bits
16
Default
DDR2 @ 200 MHz 16 bits
16
Default
DDR2 @ 200 MHz 16 bits
8
Default
DDR @ 100 MHz 16 bits
4
None
DDR @ 100 MHz 16 bits
4
Virtex-4/Virtex-5 FPGA Writes
Default
DDR2 @ 200 MHz 32 bits
16
Default
DDR2 @ 200 MHz 16 bits
16
Default
DDR2 @ 200 MHz 16 bits
8
Default
DDR @ 100 MHz 16 bits
1
None
DDR @ 100 MHz 16 bits
1
Virtex-6 FPGA Reads
Default
DDR3 @ 400 MHz 32 bits
16
Default
DDR3 @ 400 MHz 16 bits
16
Default
DDR3 @ 400 MHz 16 bits
8
Default
DDR3 @ 400 MHz 16 bits
8
Default
DDR3 @ 400 MHz 16 bits
4
None
DDR3 @ 400 MHz 16 bits
4
Virtex-6 FPGA Writes
Default
DDR3 @ 400 MHz 32 bits
16
Default
DDR3 @ 400 MHz 16 bits
16
Default
DDR3 @ 400 MHz 16 bits
8
Default
DDR3 @ 400 MHz 16 bits
8
Default
DDR3 @ 400 MHz 16 bits
4
None
DDR3 @ 400 MHz 16 bits
4
Spartan-6 FPGA Reads
Default
DDR3 @ 400 MHz 16 bits
16
Default
DDR3 @ 400 MHz 16 bits
8
Default
DDR3 @ 400 MHz 16 bits
4
Default
DDR3 @ 400 MHz 16 bits
4
Spartan-6 FPGA Writes
Default
DDR3 @ 400 MHz 16 bits
16
Default
DDR3 @ 400 MHz 16 bits
1
Default
DDR3 @ 400 MHz 16 bits
1
Default
DDR3 @ 400 MHz 16 bits
1
DXCL
DXCL
XCL
XCL
XCL
DXCL
DXCL
XCL
XCL
XCL
DXCL
DXCL
XCL
XCL
XCL
DXCL
DXCL
DXCL
XCL
XCL
XCL
DXCL
DXCL
DXCL
XCL
DXCL
DXCL
DXCL
XCL
DXCL
DXCL
DXCL
Memory to
XCL Clock
Ratio
Initial Transaction
Latency
(XCL Clocks)
Maximum Total
Data
Throughput of
XCL Port
(MB/s)
1:1
N/A
33
1:1
N/A
33
2:1
15
320
2:1
15
320
2:1
15
266
1:1
24
158
1:1
24
197
2:1
N/A
337
2:1
N/A
337
2:1
N/A
291
1:1
N/A
40
1:1
N/A
40
4:1
18
320
4:1
18
320
4:1
18
266
4:1
18
266
4:1
18
194
4:1
16
261
4:1
N/A
337
4:1
N/A
337
4:1
N/A
289
4:1
N/A
49
4:1
N/A
49
4:1
N/A
49
4:1
13
337
4:1
13
290
4:1
13
226
5:1
12
182
4:1
N/A
337
4:1
N/A
133
4:1
N/A
133
5:1
N/A
107
DS643 February 22, 2013
www.xilinx.com
202
Product Specification