C8051F970-A-GM Datasheet, PDF (94/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
16. Power Management
C8051F97x devices support seven power modes: normal active, low power active, idle, low power idle, stop,
suspend, and sleep. The power management unit (PMU0) allows the device to enter and wake-up from the
available power modes. A brief description of each power mode is provided in Table 16.1. Detailed descriptions of
each mode can be found in the following sections.
Table 16.1. Power Modes
Power Mode
Description
Wake-up Sources
Power and Performance
Normal Active
Device fully functional.
N/A
Excellent MIPS/mW
Low Power
Active
Device fully functional except
peripherals whose clocks are
intentionally disabled.
N/A
Excellent.
Clocks only enabled for peripher-
als that request for it.
Idle
All peripherals fully functional.
Wake-up in 2 clock cycles.
Low Power Idle
Similar to Idle mode, the CPU is
halted. Clocks of unused peripher-
als can be intentionally gated.
Wake-up in 2 clock cycles.
Any Interrupt
Any Interrupt
Good
No Code Execution
Very Good
No Code Execution.
Clocks only enabled for peripher-
als that request for it.
Stop
Legacy 8051 low power mode.
A reset is required to wake up.
Any Reset
Good
No Code Execution
Precision Oscillator Disabled
Suspend
Similar to Stop mode, but very fast
wake-up time and code resumes
execution at the next instruction.
CS0 comparator
threshold event,
SmaRTClock,
Port Match, I²C Slave,
RST pin
Very Good
No Code Execution
All Internal Oscillators Disabled
System Clock Gated
Sleep
Ultra Low Power and flexible
SmaRTClock,
wake-up sources. Code resumes Port Match, I²C Slave,
execution at the next instruction.
RST pin
Excellent
Power Supply Gated
All Oscillators except
SmaRTClock Disabled
In battery powered systems, the system should spend as much time as possible in sleep mode in order to preserve
battery life. When a task with a fixed number of clock cycles needs to be performed, the device should switch to
normal active mode or low power Active mode, finish the task as quickly as possible, and return to sleep mode. Idle
mode, low power idle mode and suspend mode provide a very fast wake-up time; however, the power savings in
these modes will not be as much as in sleep mode. Stop mode is included for legacy reasons; the system will be
more power efficient and easier to wake up when idle, suspend, or sleep modes are used.
Although switching power modes is an integral part of power management, clock gating and enabling/disabling
individual peripherals as needed will help lower power consumption in all power modes. Each analog peripheral
can be disabled when not in use or placed in a low power mode. Digital peripherals such as timers or serial buses
draw little power whenever they are not in use. Digital peripherals draw no power in sleep mode.
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