C8051F970-A-GM Datasheet, PDF (105/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
17.1. ADC0 Analog Multiplexer
The ADC0 module has an analog multiplexer that selects the positive inputs to the single-ended ADC0. Any of the
following may be selected as the positive input: pins from the analog pad selector (AMUX0), the on-chip
temperature sensor, internal regulated digital supply voltage (output of VREG0), VDD, or GND. The ADC0 input
channels are selected in the ADC0MX register. If any of the internal signals are selected as the ADC0 input
channel, the AMUX0 registers must not select an external pin and all be cleared to 0.
Table 17.1. ADC0 Input Multiplexer Channels
ADC0MX setting
Signal Name
QFN-48 Pin Name QFN-32 Pin Name QFN-24 Pin Name
00000 – 11010 ADC0.0 – ADC0.26
AMUX Input Selector
11011
TEMP
Temperature Sensor Output
11100
VDD
VDD Supply Voltage
11101
LDO
Internal LDO regulator output
11110
Reserved
Reserved
11111
GND
Ground
Important Note about ADC0 Input Configuration: A port pin selected as ADC0 input should be configured as
follows:
1. Set to analog mode input by clearing to 0 the corresponding bit in register PnMDIN.
2. Force the Priority Crossbar Decoder to skip the pin by setting 1 to the corresponding bit in register PnSKIP.
3. Disable the auto-ground for the pin by setting 1 to the corresponding bit in the port latch (Pn).
4. Enable the analog pad selection for the pin by setting 1 to the corresponding bit in the AMUX0Pn register.
See “26. Port I/O (Port 0, Port 1, Port 2, Port 3, Port 4, Port 5, Port 6, Crossbar, and Port Match)” on page 278 for
more Port I/O configuration details.
Rev 1.0
105