C8051F970-A-GM Datasheet, PDF (430/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
33.3.8. 16-Bit Pulse Width Modulator Mode
A PCA module may also be operated in 16-Bit PWM mode. 16-bit PWM mode is independent of the other (8/9/10/
11-bit) PWM modes. In this mode, the 16-bit capture/compare module defines the number of PCA clocks for the
low time of the PWM signal. When the PCA counter matches the module contents, the output on CEXn is asserted
high; when the 16-bit counter overflows, CEXn is asserted low. To output a varying duty cycle, new value writes
should be synchronized with PCA CCFn match interrupts. 16-Bit PWM Mode is enabled by setting the ECOMn,
PWMn, and PWM16n bits in the PCA0CPMn register. For a varying duty cycle, match interrupts should be enabled
(ECCFn = 1 AND MATn = 1) to help synchronize the capture/compare register writes. If the MATn bit is set to 1, the
CCFn flag for the module will be set each time a 16-bit comparator match (rising edge) occurs. The CF flag in
PCA0CN can be used to detect the overflow (falling edge). The duty cycle for 16-Bit PWM Mode is given by
Equation 33.4.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/Compare
registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit to 0; writing to
PCA0CPHn sets ECOMn to 1.
Duty Cycle
=
_{---6---5---5---3---6----–-----}P_----C_----A_----0----C_----P_----n_----
65536
Equation 33.4. 16-Bit PWM Duty Cycle
Using Equation 33.4, the largest duty cycle is 100% (PCA0CPn = 0), and the smallest duty cycle is 0.0015%
(PCA0CPn = 0xFFFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
Write to
PCA0CPLn
0
ENB
Reset
Write to
PCA0CPHn ^ENB
1
PCA0CPMn
PECCMT PE
WCA A AOWC
MOP P T GMC
1 MPN n n n F
6nnn
n
n
1 00x0 x
PCA0CPHn PCA0CPLn
Enable
16-bit Comparator
match _S SET _Q CEXn _Crossbar
Port I/O
R CLR Q
PCA Timebase
PCA0H
PCA0L
Overflow
Figure 33.10. PCA 16-Bit PWM Mode
Rev 1.0
431