C8051F970-A-GM Datasheet, PDF (74/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
11. On-Chip XRAM
The C8051F97x MCUs include on-chip RAM mapped into the external data memory space (XRAM). The external
memory space may be accessed using the external move instruction (MOVX) with the target address specified in
either the data pointer (DPTR), or with the target address low byte in R0 or R1. On C8051F97x devices, the target
address high byte is a don’t care.
When using the MOVX instruction to access on-chip RAM, no additional initialization is required and the MOVX
instruction execution time is as specified in the CIP-51 chapter.
Important Note: MOVX write operations can be configured to target Flash memory, instead of XRAM. See Section
“10. Flash Memory” on page 65 for more details. The MOVX instruction accesses XRAM by default.
11.1. Accessing XRAM
The XRAM memory space is accessed using the MOVX instruction. The MOVX instruction has two forms, both of
which use an indirect addressing method. The first method uses the Data Pointer, DPTR, a 16-bit register which
contains the effective address of the XRAM location to be read from or written to. The second method uses R0 or
R1 in combination with the EMI0CN register to generate the effective XRAM address. Examples of both of these
methods are given below.
11.1.1. 16-Bit MOVX Example
The 16-bit form of the MOVX instruction accesses the memory location pointed to by the contents of the DPTR
register. The following series of instructions reads the value of the byte at address 0x1234 into the accumulator A:
MOV DPTR, #1234h
; load DPTR with 16-bit address to read (0x1234)
MOVX A, @DPTR
; load contents of 0x1234 into accumulator A

The above example uses the 16-bit immediate MOV instruction to set the contents of DPTR. Alternately, the DPTR
can be accessed through the SFR registers DPH, which contains the upper 8-bits of DPTR, and DPL, which
contains the lower 8-bits of DPTR.
11.1.2. 8-Bit MOVX Example
The 8-bit form of the MOVX instruction uses the contents of the EMI0CN SFR to determine the upper 8-bits of the
effective address to be accessed and the contents of R0 or R1 to determine the lower 8-bits of the effective
address to be accessed. The following series of instructions read the contents of the byte at address 0x1234 into
the accumulator A.
MOV
MOV
MOVX
EMI0CN, #12h
R0, #34h
a, @R0
; load high byte of address into EMI0CN
; load low byte of address into R0 (or R1)
; load contents of 0x1234 into accumulator A
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