C8051F970-A-GM Datasheet, PDF (392/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
32.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload
Mode 2 configures Timer 0 and Timer 1 to operate as 8-bit counter/timers with automatic reload of the start value.
TL0 holds the count and TH0 holds the reload value. When the counter in TL0 overflows from all ones to 0x00, the
timer overflow flag TF0 in the TCON register is set and the counter in TL0 is reloaded from TH0. If Timer 0
interrupts are enabled, an interrupt will occur when the TF0 flag is set. The reload value in TH0 is not changed. TL0
must be initialized to the desired value before enabling the timer for the first count to be correct. When in Mode 2,
Timer 1 operates identically to Timer 0.
Both counter/timers are enabled and configured in Mode 2 in the same manner as Mode 0. Setting the TR0 bit
enables the timer when either GATE0 in the TMOD register is logic 0 or when the input signal INT0 is active as
defined by bit IN0PL in register IT01CF.
T0M
CT0
Pre-scaled Clock
0
0
SYSCLK
1
1
T0
TR0
GATE0
TCLK
TL0
(8 bits)
TF0
(Interrupt Flag)
INT0
IN0PL _XOR
TH0
(8 bits)
Reload
Figure 32.2. T0 Mode 2 Block Diagram
Rev 1.0
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