C8051F970-A-GM Datasheet, PDF (318/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 26.34. P5MDOUT: Port 5 Output Mode
Bit
7
6
5
4
3
2
1
0
Name
Reserved
B2
B1
B0
Type
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address: 0xFF
Table 26.37. P5MDOUT Register Bit Descriptions
Bit
Name
7:3
Reserved Must write reset value.
2
B2
Port 5 Bit 2 Output Mode.
0: P5.2 output is open-drain.
1: P5.2 output is push-pull.
1
B1
Port 5 Bit 1 Output Mode.
0: P5.1 output is open-drain.
1: P5.1 output is push-pull.
0
B0
Port 5 Bit 0 Output Mode.
0: P5.0 output is open-drain.
1: P5.0 output is push-pull.
Function
Rev 1.0
319