C8051F970-A-GM Datasheet, PDF (317/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
Register 26.33. P5MDIN: Port 5 Input Mode
Bit
7
6
5
4
Name
Reserved
Type
RW
Reset
0
0
0
0
SFR Page = 0xF; SFR Address: 0xF2
3
2
1
0
B2
B1
B0
RW
RW
RW
0
1
1
1
Table 26.36. P5MDIN Register Bit Descriptions
Bit
Name
Function
7:3
Reserved Must write reset value.
2
B2
Port 5 Bit 2 Input Mode.
0: P5.2 pin is configured for analog mode.
1: P5.2 pin is configured for digital mode.
1
B1
Port 5 Bit 1 Input Mode.
0: P5.1 pin is configured for analog mode.
1: P5.1 pin is configured for digital mode.
0
B0
Port 5 Bit 0 Input Mode.
0: P5.0 pin is configured for analog mode.
1: P5.0 pin is configured for digital mode.
Note: Port pins configured for analog mode have their weak pullup, digital driver, and digital receiver disabled.
318
Rev 1.0