C8051F970-A-GM Datasheet, PDF (327/454 Pages) Silicon Laboratories – Low Power Capacitive Sensing MCU with up to 32 kB of Flash

C8051F97x
27.11. Supply Monitor Control Registers
Register 27.2. VDM0CN: VDD Supply Monitor Control
Bit
7
6
5
4
3
2
1
0
Name VDMEN VDDSTAT VDDOK Reserved VDDOKIE
Reserved
Type
RW
R
R
R
RW
R
Reset
1
X
X
0
1
0
0
0
SFR Page = 0x0; SFR Address: 0xFF
Table 27.2. VDM0CN Register Bit Descriptions
Bit
Name
Function
7
VDMEN V_DD Supply Monitor Enable.
This bit turns the V_DD supply monitor circuit on/off. The V_DD Supply Monitor cannot gen-
erate system resets until it is also selected as a reset source in register RSTSRC.
0: Disable the V_DD supply monitor.
1: Enable the V_DD supply monitor.
6
VDDSTAT V_DD Supply Status.
This bit indicates the current power supply status.
0: V_DD is at or below the VRST threshold.
1: V_DD is above the VRST threshold.
5
VDDOK V_DD Supply Status (Early Warning).
This bit indicates the current VDD power supply status.
0: V_DD is at or below the VDDWARN threshold.
1: V_DD is above the VDDWARN threshold.
4
Reserved Must write reset value.
3
VDDOKIE V_DD Early Warning Interrupt Enable.
Enables the V_DD Early Warning interrupt.
0: Disable the V_DD Early Warning interrupt.
1: Enable the V_DD Early Warning interrupt.
2:0
Reserved Must write reset value.
328
Rev 1.0